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A. Gerosa, Neviani, A., and Zanoni, E., A SC Video Filter with Analog-RAM-based Delay Efficient Realization, in ECCTD, 1999, vol. 2, pp. 1247–1250.
F. Padovan, Tiebout, M., Dielacher, F., Bevilacqua, A., and Neviani, A., SiGe BiCMOS VCO with 27% tuning range for 5G communications, in 2015 Asia-Pacific Microwave Conference (APMC), 2015, vol. 1, pp. 1-3.
F. Padovan, Tiebout, M., Mertens, K., Bevilacqua, A., and Neviani, A., A SiGe bipolar VCO for backhaul E-band communication systems, in Proceedings of the 2012 ESSCIRC, 2012, pp. 402 -405.
A. Gerosa, RUBIN, R., and Neviani, A., A Simplified Analysis of Noise in Switched Capacitor Networks from a Circuit Design Perspective, in ECCTD, 2001, vol. 1, pp. 261–264.
A. Novo, Gerosa, A., and Neviani, A., A Sub-Micron CMOS Programmable Charge Pump for Implantable Pacemaker, ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 27, pp. 211–217, 2001.
D. Vogrig, Bevilacqua, A., Gerosa, A., and Neviani, A., A symbol-duty-cycled 440 pJ/b impulse radio receiver with 0.57 aJ sensitivity in 130 nm CMOS, in Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE, 2015, pp. 243-246.
D. Vogrig, Bevilacqua, A., Gerosa, A., and Neviani, A., A Symbol-Duty-Cycled 440-pJ/b Impulse Radio Receiver With 0.57-aJ Sensitivity in 130-nm CMOS, IEEE Transactions on Microwave Theory and Techniques, vol. 65, pp. 565-573, 2017.