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Integrated Circuits for Analog and RF µ-Systems
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Vogrig, D.
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2017
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A Symbol-Duty-Cycled 440-pJ/b Impulse Radio Receiver With 0.57-aJ Sensitivity in 130-nm CMOS
”
,
IEEE Transactions on Microwave Theory and Techniques
, vol. 65, pp. 565-573, 2017.
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2015
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A symbol-duty-cycled 440 pJ/b impulse radio receiver with 0.57 aJ sensitivity in 130 nm CMOS
”
, in
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
, 2015, pp. 243-246.
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2011
C. Fantozzi
,
Vangelista, L.
,
Vogrig, D.
, and
Campana, O.
,
“
SDR implementation of a DVB-T2 transmitter: The core building blocks
”
, in
2011 IEEE International Conference on Consumer Electronics (ICCE)
, 2011, pp. 391 -392.
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Recent Publications
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
Galvanic-Coupled Trans-Dural Data Transfer for High-Bandwidth Intracortical Neural Sensing
A 24 GHz Quadrature VCO Based on Coupled PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset in 28 nm CMOS
A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
More...