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T

L. Tomasin, Vogrig, D., Neviani, A., and Bevilacqua, A., “A Reactive Passive Mixer for 16-QAM Cartesian IoT Transmitters in 22 nm FD-SOI CMOS”, in 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023.

P

F. Pepe, Bevilacqua, A., and Andreani, P., “On the Remarkable Performance of the Series-Resonance CMOS Oscillator”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, pp. 531-542, 2018.

M

G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., “A Reconfigurable Switched Capacitor DC–DC Converter With 1.9–6.3-V Input Voltage Range and 85% Peak Efficiency in 28-nm CMOS”, IEEE Solid-State Circuits Letters, vol. 3, pp. 106-109, 2020.

G

A. Gerosa, “A ready-to-use design procedure for operational transconductance amplifiers that minimizes power consumption”, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 949 -952 vol.2.

C

A. Celin and Gerosa, A., “A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior”, in 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 702-705.