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Integrated Circuits for Analog and RF µ-Systems
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Maniero, A.
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Conference Paper
A. Maniero
,
Gerosa, A.
, and
Neviani, A.
,
“
Performance Optimization in Micro-Power, Low-Voltage, Log-Domain Filters in Pure CMOS Technology
”
, in
ISCAS
, 2003, vol. 1, pp. 565–568.
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Recent Publications
A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
A Broadband 22-31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications
Doubly-Tuned Transformer Networks: A Tutorial
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