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Integrated Circuits for Analog and RF µ-Systems
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G
A. Gerosa
and
Neviani, A.
,
“
A LOW-POWER DECIMATION FILTER FOR A SIGMA-DELTA CONVERTER BASED ON A POWER-OPTMIZED SINC FILTER
”
, in
ISCAS
, 2004, vol. 2, pp. 245–248.
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A. Gerosa
and
Mian, G. A.
,
“
A low complexity EPR-IV equalizer for hard disk read channels
”
, in
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
, 1999, vol. 2, pp. 1069 -1072 vol.2.
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A. Gerosa
,
Novo, A.
, and
Neviani, A.
,
“
Low-power sensing and digitization of cardiac signals based on sigma-delta conversion
”
, in
Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on
, 2000, pp. 216 - 218.
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A. Gerosa
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A local oscillator for WCDMA band VII based on frequency multiplication
”
,
Analog Integrated Circuits and Signal Processing
, vol. 72, no. 1, 2012.
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M
A. Maniero
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 90 -93.
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N
A. Neviani
,
Bevilacqua, A.
,
Gerosa, A.
, and
Vogrig, D.
,
“
Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications
”
, in
2012 IEEE International Conference on IC Design Technology (ICICDT)
, 2012, pp. 1 -4.
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P
A. Passamani
,
Ponton, D.
,
Knoblinger, G.
, and
Bevilacqua, A.
,
“
A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers
”
, in
2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
, 2014, pp. 1-4.
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S
S. Soldà
,
Caruso, M.
,
Vogrig, D.
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
Low-power UWB transmitter using a combined mixer and power amplifier
”
, in
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
, 2010, pp. 333 -336.
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Recent Publications
Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters
On the Efficiency of Output-Matched Radiofrequency Power Amplifiers
Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology
On the Benefits of the Common-Mode Resonance on the 1/f ² Phase Noise Sideband
A 48-58GHz Frac-N DPLL achieving 137fs integrated jitter and fast locking time below 1μs
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