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Integrated Circuits for Analog and RF µ-Systems
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A. Bevilacqua
,
“
Great lessons from the back of the envelope
”
,
IEEE Solid-State Circuits Magazine
, vol. 6, pp. 45-45, 2014.
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M
G. Marin
,
Cherniak, K.
,
Subotskaya, V.
,
Bodano, E.
,
Sandner, C.
, and
Bevilacqua, A.
,
“
Global Optimization of Reconfigurable Switched Capacitor DC-DC Converters
”
, in
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
, 2019.
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Recent Publications
A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
A Broadband 22-31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications
A 20-GHz Class-C VCO With 80-GHz Fourth-Harmonic Output in 28-nm CMOS
More...