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, “A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system”, in Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on, 2001, pp. 87 -92.
, “A Fully Integrated Chaotic System for the Generation of Truly Random Numbers”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. FUNDAMENTAL THEORY AND APPLICATIONS, vol. 49, pp. 993–1000, 2002.
, “Frequency Offset Compensation in Fractionally Spaced Equalization”, IEE PROCEEDINGS. CIRCUITS, DEVICES AND SYSTEMS, vol. 150, pp. 134–140, 2003.
, “A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers”, in ESSCIRC, 2003, vol. 1, pp. 157–160.
, “A Fully-Integrated Dual-Channel Log-Domain Programmable Preamplifier and Filter for an Implantable Cardiac Pacemakers”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, vol. 51, pp. 1916–1925, 2004.
, “A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 39, pp. 1083–1093, 2004.
, “A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers”, IEEE Microwave and Wireless Components Letters, vol. 16, pp. 134 -136, 2006.
, “Fundamentals of Integrated Transformers: From Principles to Applications”, IEEE Solid-State Circuits Magazine, vol. 12, pp. 86-100, 2020.
, “A Fully Integrated 28 GHz Class-J Doherty Power Amplifier in 130 nm BiCMOS”, in SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME, 2021.
, “A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time”, IEEE Journal of Solid-State Circuits, pp. 1-14, 2022.