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Integrated Circuits for Analog and RF µ-Systems
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MMIC oscillators
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2018
F. Padovan
,
Quadrelli, F.
,
Bassi, M.
,
Tiebout, M.
, and
Bevilacqua, A.
,
“
A quad-core 15GHz BiCMOS VCO with -124dBc/Hz phase noise at 1MHz offset, -189dBc/Hz FOM, and robust to multimode concurrent oscillations
”
, in
2018 IEEE International Solid - State Circuits Conference - (ISSCC)
, 2018.
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2010
S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.06 mm2 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS
”
,
IEEE Journal of Solid-State Circuits
, vol. 45, pp. 1295 -1304, 2010.
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A. Gerosa
,
Soldà, S.
,
Bevilacqua, A.
,
Vogrig, D.
, and
Neviani, A.
,
“
A digitally programmable ring oscillator in the UWB range
”
, in
Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS),
, 2010, pp. 1101 -1104.
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2008
J. Borremans
,
Bevilacqua, A.
,
Bronckers, S.
,
Dehan, M.
,
Kuijk, M.
,
Wambacq, P.
, and
Craninckx, J.
,
“
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS
”
,
IEEE Journal of Solid-State Circuits
, vol. 43, pp. 2693 -2705, 2008.
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2007
A. Bevilacqua
,
Pavan, F. P.
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
Transformer-Based Dual-Mode Voltage-Controlled Oscillators
”
,
IEEE Transactions on Circuits and Systems II: Express Briefs
, vol. 54, pp. 293 -297, 2007.
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Recent Publications
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
On the Benefits of the Common-Mode Resonance On the 1/f2 Phase Noise Sideband
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
On the Design Challenges of Class-C Oscillators in Ultra-Scaled CMOS Technologies
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