A. Iesurum, Manente, D., Padovan, F., Bassi, M., and Bevilacqua, A.,
“Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs”,
IEEE Journal of Solid-State Circuits, vol. 59, pp. 294-306, 2024.
F. Padovan, Tiebout, M., Mertens, K. L. R., Bevilacqua, A., and Neviani, A.,
“Design of Low-Noise K -Band SiGe Bipolar VCOs: Theory and Implementation”,
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 607-615, 2015.
A. Franceschin, Padovan, F., Nonis, R., and Bevilacqua, A.,
“On the Optimal Operation Frequency to Minimize Phase Noise in Integrated Harmonic Oscillators”,
IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 5, pp. 657 - 661, 2018.