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S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS
”
, in
Proceedings of ESSCIRC 2009
, 2009, pp. 444 -447.
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S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.06 mm2 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS
”
,
IEEE Journal of Solid-State Circuits
, vol. 45, pp. 1295 -1304, 2010.
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4
A. Bevilacqua
,
Lorenzon, L.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 4.1 to 5.1 GHz 430 uA injection-locked frequency divider by 7 in 65 nm CMOS
”
, in
Proceedings of the ESSCIRC 2010
, 2010, pp. 150 -153.
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O
A. Celin
and
Gerosa, A.
,
“
Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs
”
, in
2015 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2015, pp. 1454-1457.
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R
A. Celin
and
Gerosa, A.
,
“
A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior
”
, in
2016 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2016, pp. 702-705.
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Recent Publications
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
On the Benefits of the Common-Mode Resonance On the 1/f2 Phase Noise Sideband
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
On the Design Challenges of Class-C Oscillators in Ultra-Scaled CMOS Technologies
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