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Integrated Circuits for Analog and RF µ-Systems
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0.18 micron
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2007
A. Gerosa
,
Soldan, M.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 0.18-um CMOS Squarer Circuit for a Non-Coherent UWB Receiver
”
, in
IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007
, 2007, pp. 421 -424.
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2005
A. Bevilacqua
and
Svelto, F.
,
“
Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers
”
,
IEEE Transactions on Circuits and Systems II: Express Briefs
, vol. 52, pp. 117 - 121, 2005.
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2004
A. Bevilacqua
and
Niknejad, A. M.
,
“
An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers
”
, in
Digest of Technical Papers of 2004 IEEE International Solid-State Circuits Conference
, 2004, pp. 382 - 533 Vol.1.
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2002
A. Xotta
,
Vogrig, D.
,
Gerosa, A.
,
Neviani, A.
,
Graell i Amat, A.
,
Montorsi, G.
,
Bruccoleri, M.
, and
Betti, G.
,
“
An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels
”
, in
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
, 2002, vol. 5, p. V-69 - V-72 vol.5.
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Recent Publications
A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
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Doubly-Tuned Transformer Networks: A Tutorial
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