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Integrated Circuits for Analog and RF µ-Systems
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G. Boi
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Recent Publications
A 48-58GHz Frac-N DPLL achieving 137fs integrated jitter and fast locking time below 1μs
A Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters
On the Efficiency of Output-Matched Radiofrequency Power Amplifiers
More...