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[ Author(Desc)] Title Type Year
Filters: Keyword is CMOS analogue integrated circuits  [Clear All Filters]
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A
A. G. I. Amatt, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., An analog turbo decoder for the rate-1/3, 40 bit, UMTS turbo code, in Communications, 2005. ICC 2005. 2005 IEEE International Conference on, 2005, vol. 1, pp. 663 - 667 Vol. 1.
G
A. Gerosa, Neviani, A., and Cortelazzo, G. M., A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters, in Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on, 1999, pp. 195 -198.
A. Gerosa, Novo, A., and Neviani, A., An analog front-end for the acquisition of biomedical signals, fully integrated in a 0.8 um CMOS process, in Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on, 2001, pp. 152 -157.
A. Gerosa, Novo, A., Mengalli, A., and Neviani, A., A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker, in Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001, vol. 1, pp. 296 -299 vol. 1.
A. Gerosa, Cortelazzo, G. M., Baschirotto, A., and Malavasi, E., 2D video rate SC FIR filters based on analog RAMs, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 46, pp. 1348 -1360, 1999.
A. Graell i Amat, Montorsi, G., Benedetto, S., Vogrig, D., Neviani, A., and Gerosa, A., An analog turbo decoder for the UMTS standard, in Information Theory, 2004. ISIT 2004. Proceedings. International Symposium on, 2004, p. 296.
A. Graell i Amat, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code, Communications, IEEE Transactions on, vol. 54, pp. 1973 -1982, 2006.
M
A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.
P
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., Analysis and design of a 1.1dB-IL third-order Matching Network for Switched-Capacitor PAs, in Nordic Circuits and Systems Conference (NORCAS): NORCHIP International Symposium on System-on-Chip (SoC), 2015, 2015, pp. 1-4.
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers, in 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2014, pp. 1-4.