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Integrated Circuits for Analog and RF µ-Systems
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J. Zhao
,
Bassi, M.
,
Bevilacqua, A.
,
Ghilioni, A.
,
Mazzanti, A.
, and
Svelto, F.
,
“
A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP
”
, in
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
, 2014, pp. 179-182.
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S
P. Scaramuzza
,
Rubino, C.
,
Tiebout, M.
,
Caruso, M.
,
Ortner, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systems
”
, in
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
, 2017, pp. 187-190.
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P
F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 12 GHz 22 dB-Gain-Control SiGe Bipolar VGA With 2° Phase-Shift Variation
”
,
IEEE Journal of Solid-State Circuits
, vol. 51, pp. 1525-1536, 2016.
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F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variation
”
, in
European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st
, 2015, pp. 56-59.
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F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 15.5-39GHz BiCMOS VGA with phase shift compensation for 5G mobile communication transceivers
”
, in
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference
, 2016, pp. 363-366.
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Recent Publications
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
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A Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies
On the Efficiency of Output-Matched Radiofrequency Power Amplifiers
Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology
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