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Bevilacqua, A.
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2002
A. Bevilacqua
and
Svelto, F.
,
“
Non-linear spectral analysis of direct conversion wireless receivers
”
, in
IEEE 2002 Radio and Wireless Conference
, 2002, pp. 39 - 42.
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2004
A. Bevilacqua
and
Niknejad, A. M.
,
“
An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers
”
, in
Digest of Technical Papers of 2004 IEEE International Solid-State Circuits Conference
, 2004, pp. 382 - 533 Vol.1.
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A. Bevilacqua
and
Niknejad, A. M.
,
“
An Ultrawideband CMOS Low-Noise Amplifier for 3.1–10.6-GHz Wireless Receivers
”
,
IEEE Journal of Solid-State Circuits
, vol. 39, pp. 2259–2268, 2004.
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2005
A. Bevilacqua
and
Svelto, F.
,
“
Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers
”
,
IEEE Transactions on Circuits and Systems II: Express Briefs
, vol. 52, pp. 117 - 121, 2005.
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2006
A. Bevilacqua
,
Maniero, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.35 um SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 1015 -1018.
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A. Bevilacqua
,
Pavan, F. P.
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 3.4-7 GHz Transformer-Based Dual-mode Wideband VCO
”
, in
Proceedings of the 32nd European Solid-State Circuits Conference
, 2006, pp. 440 -443.
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A. Gerosa
,
Xotta, A.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Σ Δ Modulator and a Flash Converter
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 53, pp. 2109 -2124, 2006.
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A. Bevilacqua
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers
”
,
IEEE Microwave and Wireless Components Letters
, vol. 16, pp. 134 -136, 2006.
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A. Maniero
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 90 -93.
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A. Gerosa
,
Bevilacqua, A.
,
Neviani, A.
, and
Xotta, A.
,
“
An optimal architecture for a multimode ADC, based on the cascade of a Sigma-Delta modulator and a flash converter
”
, in
Proceedings of 2006 IEEE International Symposium on Circuits and Systems
, 2006, p. 4 pp.
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2007
A. Bevilacqua
,
Vallese, A.
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.13 um CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers
”
, in
Digest of Technical Papers of 2007 IEEE International Solid-State Circuits Conference
, 2007, pp. 420 -612.
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A. Gerosa
,
Soldan, M.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 0.18-um CMOS Squarer Circuit for a Non-Coherent UWB Receiver
”
, in
IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007
, 2007, pp. 421 -424.
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A. Vallese
,
Bevilacqua, A.
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 um CMOS
”
, in
Proc. of IEEE 2007 European Solid State Circuits Conference
, 2007, pp. 139 -142.
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A. Bevilacqua
,
Maniero, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
An Integrated Solution for Suppressing WLAN Signals in UWB Receivers
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 54, pp. 1617 -1625, 2007.
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A. Bevilacqua
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
Quadrature VCOs Based on Coupled PLLs
”
, in
IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007
, 2007, pp. 2140 -2143.
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A. Bevilacqua
,
Pavan, F. P.
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
Transformer-Based Dual-Mode Voltage-Controlled Oscillators
”
,
IEEE Transactions on Circuits and Systems II: Express Briefs
, vol. 54, pp. 293 -297, 2007.
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2008
A. Bevilacqua
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 6-9-GHz programmable gain LNA with integrated balun in 90-nm CMOS
”
, in
IEEE International Conference on Ultra-Wideband, 2008. ICUWB 2008.
, 2008, vol. 1, pp. 25 -28.
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S. Soldà
,
Vogrig, D.
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
Analog decoding of trellis coded modulation for multi-level flash memories
”
, in
IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008.
, 2008, pp. 744 -747.
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J. Borremans
,
Bevilacqua, A.
,
Bronckers, S.
,
Dehan, M.
,
Kuijk, M.
,
Wambacq, P.
, and
Craninckx, J.
,
“
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS
”
,
IEEE Journal of Solid-State Circuits
, vol. 43, pp. 2693 -2705, 2008.
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A. Bevilacqua
,
Camponeschi, M.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
Design of broadband inductorless LNAs in ultra-scaled CMOS technologies
”
, in
IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008.
, 2008, pp. 1300 -1303.
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A. Gerosa
,
Costa, M. D.
,
Bevilacqua, A.
,
Vogrig, D.
, and
Neviani, A.
,
“
An energy-detector for non-coherent impulse-radio UWB receivers
”
, in
IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008
, 2008, pp. 2705 -2708.
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S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Marsili, S.
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking
”
,
IEEE Journal of Solid-State Circuits
, vol. 43, pp. 2844 -2852, 2008.
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S. D. Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Marsili, S.
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking
”
, in
Digest of Technical Papers of 2008 IEEE International Solid-State Circuits Conference
, 2008, pp. 124 -601.
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2009
S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS
”
, in
Proceedings of ESSCIRC 2009
, 2009, pp. 444 -447.
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M. Camponeschi
,
Bevilacqua, A.
, and
Andreani, P.
,
“
Analysis and design of a low-power single-stage CMOS wireless receiver
”
, in
Proc. of 2009 NORCHIP
, 2009, pp. 1 -4.
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Analysis of CMRR in Doubly-Tuned Transformer Baluns
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
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