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2018

F. Padovan, Quadrelli, F., Bassi, M., Tiebout, M., and Bevilacqua, A., “A quad-core 15GHz BiCMOS VCO with -124dBc/Hz phase noise at 1MHz offset, -189dBc/Hz FOM, and robust to multimode concurrent oscillations”, in 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018.

2019

F. Quadrelli, Panazzolo, F., Tiebout, M., Padovan, F., Bassi, M., and Bevilacqua, A., “A 18.2-29.3 GHz Colpitts VCOs bank with -119.5 dBc/Hz Phase Noise at 1 MHz Offset for 5G Communications”, in 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019.

A. Franceschin, Andreani, P., Padovan, F., Bassi, M., Nonis, R., and Bevilacqua, A., “A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion”, in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), 2019.

M. Bassi, Boi, G., Padovan, F., Fritzin, J., Di Martino, S., Knauder, D., and Bevilacqua, A., “A 39-GHz Frequency Tripler With >40-dBc Harmonic Rejection for 5G Communication Systems in 28-nm Bulk CMOS”, IEEE Solid-State Circuits Letters, vol. 2, pp. 107-110, 2019.

D. Oloumi, Bevilacqua, A., and Bassi, M., “UWB Radar for High Resolution Breast Cancer Scanning: System, Architectures, and Challenges”, in 2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2019.

2020

A. Franceschin, Andreani, P., Padovan, F., Bassi, M., and Bevilacqua, A., “A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/f Noise Upconversion Caused by Short-Channel Effects”, IEEE Journal of Solid-State Circuits, vol. 55, pp. 1842-1853, 2020.

D. Manente, Padovan, F., Seebacher, D., Bassi, M., and Bevilacqua, A., “A 28-GHz Stacked Power Amplifier with 20.7-dBm Output P1dB in 28-nm Bulk CMOS”, IEEE Solid-State Circuits Letters, vol. 3, pp. 170-173, 2020.