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Padovan, Fabio
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2022
L. Tomasin
,
Andreani, P.
,
Boi, G.
,
Padovan, F.
, and
Bevilacqua, A.
,
“
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
”
,
IEEE Journal of Solid-State Circuits
, pp. 1-1, 2022.
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F. Quadrelli
,
Manente, D.
,
Seebacher, D.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A Broadband 22-31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications
”
,
IEEE Journal of Solid-State Circuits
, vol. 57, pp. 1968-1981, 2022.
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2021
L. Tomasin
,
Boi, G.
,
Padovan, F.
, and
Bevilacqua, A.
,
“
A 10.7–14.1 GHz Reconfigurable Octacore DCO with −126 dBc/Hz Phase Noise at 1 MHz offset in 28 nm CMOS
”
, in
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
, 2021.
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A. Franceschin
,
Quadrelli, F.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A 20-GHz Class-C VCO With 80-GHz Fourth-Harmonic Output in 28-nm CMOS
”
,
IEEE Microwave and Wireless Components Letters
, vol. 31, pp. 1154-1157, 2021.
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2013
F. Padovan
,
Tiebout, M.
,
Mertens, K.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A K-band SiGe bipolar VCO with transformer-coupled varactor for backhaul links
”
, in
2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF),
, 2013, pp. 108-110.
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Recent Publications
A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
A Broadband 22-31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications
Doubly-Tuned Transformer Networks: A Tutorial
More...