@conference {957630,
	title = {A ready-to-use design procedure for operational transconductance amplifiers that minimizes power consumption},
	booktitle = {Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on},
	volume = {2},
	year = {2001},
	pages = {949 -952 vol.2},
	keywords = {bias current, circuit optimisation, design equations, design procedure, electric current, folded-cascode amplifier, minimized power consumption, network synthesis, operational amplifiers, operational transconductance amplifiers, OTA design procedure, OTA performance, power optimized OTA, switched capacitor networks, switched capacitor stage, transistor size},
	doi = {10.1109/ICECS.2001.957630},
	author = {Gerosa, A.}
}
@conference {813418,
	title = {A low complexity EPR-IV equalizer for hard disk read channels},
	booktitle = {Electronics, Circuits and Systems, 1999. Proceedings of ICECS {\textquoteright}99. The 6th IEEE International Conference on},
	volume = {2},
	year = {1999},
	pages = {1069 -1072 vol.2},
	keywords = {0.35 mum, ADC accuracy, analogue-digital conversion, area consumption, BRE, circuit design, circuit simulation, CMOS integrated circuits, complexity, digital post-processing, equalisers, equalization performance, FIR filters, fractionally spaced equalization, hard discs, hard disk read channels, low complexity EPR-IV equalizer, memory architecture, network synthesis, power consumption, sampled data, sampled data circuits, standard CMOS, transistor level simulation},
	doi = {10.1109/ICECS.1999.813418},
	author = {Gerosa, A. and Mian, G.A.}
}
