@article {803474,
	title = {2D video rate SC FIR filters based on analog RAMs},
	journal = {Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on},
	volume = {46},
	number = {11},
	year = {1999},
	pages = {1348 -1360},
	keywords = {2D video rate SC FIR filters, analog RAMs, analog random-access memories, analogue storage, area requirements, broadband characteristic, CMOS analogue integrated circuits, delay lines, FIR filters, impulse-response symmetries, linear phase filters, linear-phase FIR fitters, low-pass filter, low-pass filters, monolithic CMOS analog implementations, picture-in-picture resizing, power requirements, precision requirements, random-access storage, switched capacitor filters, switched-capacitor circuits, video signal processing},
	issn = {1057-7130},
	doi = {10.1109/82.803474},
	author = {Gerosa, A. and Cortelazzo, G.M. and Baschirotto, A. and Malavasi, E.}
}
@conference {813418,
	title = {A low complexity EPR-IV equalizer for hard disk read channels},
	booktitle = {Electronics, Circuits and Systems, 1999. Proceedings of ICECS {\textquoteright}99. The 6th IEEE International Conference on},
	volume = {2},
	year = {1999},
	pages = {1069 -1072 vol.2},
	keywords = {0.35 mum, ADC accuracy, analogue-digital conversion, area consumption, BRE, circuit design, circuit simulation, CMOS integrated circuits, complexity, digital post-processing, equalisers, equalization performance, FIR filters, fractionally spaced equalization, hard discs, hard disk read channels, low complexity EPR-IV equalizer, memory architecture, network synthesis, power consumption, sampled data, sampled data circuits, standard CMOS, transistor level simulation},
	doi = {10.1109/ICECS.1999.813418},
	author = {Gerosa, A. and Mian, G.A.}
}
@conference {768617,
	title = {A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters},
	booktitle = {Mixed-Signal Design, 1999. SSMSD {\textquoteright}99. 1999 Southwest Symposium on},
	year = {1999},
	pages = {195 -198},
	keywords = {0.8 micron, 2D SC FIR filters, analogue storage, CMOS analogue integrated circuits, CMOS technology, convolution, delay efficient realization, delays, filter impulse response symmetry, filter phase linearity, FIR filters, inner filter delays, partial accumulation analog-RAM-based architecture, partial convolution products, picture-in-picture applications, random-access storage, switched capacitor filters, transient response, video applications, video signal processing},
	doi = {10.1109/SSMSD.1999.768617},
	author = {Gerosa, A. and Neviani, A. and Cortelazzo, G.M.}
}
