@conference {718,
	title = {A DLL-Based FSK Demodulator for Asynchronous Communications},
	booktitle = {2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)},
	year = {2025},
	keywords = {Asynchronous communication, asynchronous communications, Clocks, CMOS, CMOS technology, delaylocked loop, Demodulation, Frequency shift keying, frequency-shift keying (FSK), phase locked loops, Power demand, Semiconductor device modeling, Tracking loops, Wireless communication, wireline communication},
	doi = {10.1109/PRIME66228.2025.11203677},
	author = {Navarin, Lucrezia and Neviani, Andrea and Bevilacqua, A.}
}
@article {665,
	title = {Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs},
	journal = {IEEE Journal of Solid-State Circuits},
	volume = {59},
	year = {2024},
	pages = {294-306},
	keywords = {CMOS, coupled phase-locked loop (CPLL), Couplings, Harmonic analysis, Mixers, phase locked loops, phase noise, quadrature voltage-controlled oscillator (QVCO), radio frequency integrated circuits (RFIC), Steady-state, voltage-controlled oscillators},
	doi = {10.1109/JSSC.2023.3280360},
	author = {Iesurum, Agata and Manente, Davide and Padovan, Fabio and Bassi, Matteo and Bevilacqua, A.}
}
@article {6939739,
	title = {A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications},
	journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
	volume = {62},
	number = {2},
	year = {2015},
	month = {Feb},
	pages = {413-422},
	keywords = {CMOS, Frequency conversion, frequency divider, frequency division, Harmonic analysis, harmonic rejection, phase locked loops, Radar imaging, receivers, stepped frequency continuous wave (SFCW), transmitters, UWB transmitter},
	issn = {1549-8328},
	doi = {10.1109/TCSI.2014.2362332},
	author = {Caruso, M. and Bassi, M. and Bevilacqua, A. and Neviani, A.}
}
@conference {4253094,
	title = {Quadrature VCOs Based on Coupled PLLs},
	booktitle = {IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007},
	year = {2007},
	pages = {2140 -2143},
	keywords = {0.13 micron, CMOS digital integrated circuits, coupled PLL, digital CMOS technology, dual-mode quadrature VCO, phase locked loops, quadrature signal generation, voltage-controlled oscillators},
	doi = {10.1109/ISCAS.2007.378596},
	author = {Bevilacqua, A. and Sandner, C. and Gerosa, A. and Neviani, A.}
}
