D.  Frassetto, Cabizza, S., Zilio, N. ', Karim, A., Garbossa, C., Agostinelli, M., Spiazzi, G., Bevilacqua, A., and Neviani, A., ?A Highly Integrated Dual-Path Step-Down Hybrid DC?DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current?, IEEE Open Journal of Power Electronics, vol. 7, pp. 167-179, 2026.

S.  Marconi, Spiazzi, G., Bevilacqua, A., and Galvano, M., ?A Novel Integrated Step-Up Hybrid Converter With Wide Conversion Ratio?, IEEE Transactions on Power Electronics, vol. 35, pp. 2764-2775, 2020.

A.  Gatti, Spiazzi, G., Gerosa, A., Neviani, A., and Bevilacqua, A., ?A 130-nm CMOS Dual Input-Polarity DC?DC Converter for Low-Power Applications?, IEEE Solid-State Circuits Letters, vol. 2, pp. 211-214, 2019.

G.  Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., ?Non-isolated High Step-up DC-DC Converter with Minimum Switch Voltage Stress?, IEEE Transactions on Power Electronics, vol. 34, no. 2, pp. 1470-1480, 2019.

A.  Franceschin, Padovan, F., Nonis, R., and Bevilacqua, A., ?On the Optimal Operation Frequency to Minimize Phase Noise in Integrated Harmonic Oscillators?, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 5, pp. 657 - 661, 2018.

G.  Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., ?Non-isolated high step-up DC-DC converter with minimum switch voltage stress?, in 2017 IEEE Southern Power Electronics Conference (SPEC), 2017.

F.  Padovan, Tiebout, M., Neviani, A., and Bevilacqua, A., ?A 15.5-39GHz BiCMOS VGA with phase shift compensation for 5G mobile communication transceivers?, in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 2016, pp. 363-366.

G.  Spiazzi, Marconi, S., and Bevilacqua, A., ?Step-Up DC-DC converters combining basic topologies with charge pump?, in 2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), 2016, pp. 1-6.

M.  Bassi, Zhao, J., Bevilacqua, A., Ghilioni, A., Mazzanti, A., and Svelto, F., ?A 40-67 GHz Power Amplifier With 13 dBm PSAT and 16% PAE in 28 nm CMOS LP?, IEEE Journal of Solid-State Circuits, vol. 50, pp. 1618-1628, 2015.

J.  Zhao, Bassi, M., Bevilacqua, A., Ghilioni, A., Mazzanti, A., and Svelto, F., ?A 40-67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP?, in European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th, 2014, pp. 179-182.

J.  Borremans, Bevilacqua, A., Bronckers, S., Dehan, M., Kuijk, M., Wambacq, P., and Craninckx, J., ?A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS?, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2693 -2705, 2008.