D.  Frassetto, Cabizza, S., Zilio, N. ', Karim, A., Garbossa, C., Agostinelli, M., Spiazzi, G., Bevilacqua, A., and Neviani, A., ?A Highly Integrated Dual-Path Step-Down Hybrid DC?DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current?, IEEE Open Journal of Power Electronics, vol. 7, pp. 167-179, 2026.

D.  Pecile, Kokorovic, S., Gambarucci, A., and Bevilacqua, A., ?A 5.1?10.5 GHz SiGe BiCMOS Power Amplifier for 6GNR with 29 dBm PSAT and 40.1% PAE?, in 2025 IEEE 24th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2025.

D.  Pecile, Gambarucci, A., Kokorovic, S., and Bevilacqua, A., ?Analysis and Design of a SiGe BiCMOS PA for 6G FR3 Band With 29-dBm P SAT and 40.1% PAE?, IEEE Transactions on Microwave Theory and Techniques, pp. 1-12, 2025.

L.  Guglielmini and Bevilacqua, A., ?Analysis of a gm-C Complex Filter for Low Power Wireless Receivers?, in 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), 2025.

E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., ?Analysis of a Three-Way Voltage-Mode Digital Doherty Power Amplifier for Bluetooth Applications?, in 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), 2025.

D.  Frassetto, Cabizza, S., Agostinelli, M., Garbossa, C., Spiazzi, G., Bevilacqua, A., and Neviani, A., ?Analysis of Hybrid Dual-Path Step-Down Topology for High-Frequency, Integrated Dc-Dc Converters?, in 2025 International Conference on IC Design and Technology (ICICDT), 2025.

N.  Zugno and Bevilacqua, A., ?Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology?, in 2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2024.

L.  Bellemo and Bevilacqua, A., ?On the Benefits of the Common-Mode Resonance on the 1/f ² Phase Noise Sideband?, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, pp. 3715-3719, 2024.

S.  Marconi, Spiazzi, G., Bevilacqua, A., and Galvano, M., ?A Novel Integrated Step-Up Hybrid Converter With Wide Conversion Ratio?, IEEE Transactions on Power Electronics, vol. 35, pp. 2764-2775, 2020.

F.  Quadrelli, Panazzolo, F., Tiebout, M., Padovan, F., Bassi, M., and Bevilacqua, A., ?A 18.2-29.3 GHz Colpitts VCOs bank with -119.5 dBc/Hz Phase Noise at 1 MHz Offset for 5G Communications?, in 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019.

G.  Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., ?Non-isolated High Step-up DC-DC Converter with Minimum Switch Voltage Stress?, IEEE Transactions on Power Electronics, vol. 34, no. 2, pp. 1470-1480, 2019.

F.  Pepe, Bevilacqua, A., and Andreani, P., ?On the Remarkable Performance of the Series-Resonance CMOS Oscillator?, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, pp. 531-542, 2018.

G.  Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., ?Non-isolated high step-up DC-DC converter with minimum switch voltage stress?, in 2017 IEEE Southern Power Electronics Conference (SPEC), 2017.

G.  Spiazzi, Marconi, S., and Bevilacqua, A., ?Step-Up DC-DC converters combining basic topologies with charge pump?, in 2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), 2016, pp. 1-6.