@conference {4541525,
	title = {Analog decoding of trellis coded modulation for multi-level flash memories},
	booktitle = {IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008.},
	year = {2008},
	pages = {744 -747},
	keywords = {analog decoding, decoding, error correction, error correction codes, flash memories, multilevel flash memories, probabilistic decoding algorithms, transistor-level solutions, trellis coded modulation},
	doi = {10.1109/ISCAS.2008.4541525},
	author = {Sold{\`a}, S. and Vogrig, D. and Bevilacqua, A. and Gerosa, A. and Neviani, A.}
}
@article {4012490,
	title = {Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code},
	journal = {Communications, IEEE Transactions on},
	volume = {54},
	number = {11},
	year = {2006},
	pages = {1973 -1982},
	keywords = {0.35 micron, 3.3 V, 3G mobile communication, bit-error rate, block length-40 UMTS turbo code, circuit transient behavior, CMOS analog decoder, CMOS analogue integrated circuits, component mismatch, decoding, discrete time systems, discrete-time first-order model, error statistics, fast BER simulation, integrated circuit design, integrated circuit testing, Third Generation Partnership Project standard, transistor-level simulation, turbo codes, universal mobile telecommunications system},
	issn = {0090-6778},
	doi = {10.1109/TCOMM.2006.884836},
	author = {Graell i Amat, A. and Benedetto, S. and Montorsi, G. and Vogrig, D. and Neviani, A. and Gerosa, A.}
}
@conference {1010642,
	title = {An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels},
	booktitle = {Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on},
	volume = {5},
	year = {2002},
	pages = {V-69 - V-72 vol.5},
	keywords = {0.18 micron, 1.8 V, 400 Mbit/s, 650 mW, all-analog CMOS implementation, analogue processing circuits, CMOS analogue integrated circuits, coding gain, current-mode approach, current-mode circuits, decoding, disc drives, EPR-IV read channels, hard discs, hard-disk drive read channels, power efficiency, sum-product algorithms, total simulated power consumption, turbo codes, turbo decoder},
	doi = {10.1109/ISCAS.2002.1010642},
	author = {Xotta, A. and Vogrig, D. and Gerosa, A. and Neviani, A. and Graell i Amat, A. and Montorsi, G. and Bruccoleri, M. and Betti, G.}
}
@article {972176,
	title = {CMOS implementation of all-analogue APP decoders: analysis of performances and limitations},
	journal = {Electronics Letters},
	volume = {37},
	number = {25},
	year = {2001},
	pages = {1501 -1503},
	keywords = {a posteriori-probability decoding algorithm, analogue processing circuits, CMOS all-analogue APP decoder, CMOS analogue integrated circuits, decoding, MOS transistor, tail-biting decoder, weak inversion region},
	issn = {0013-5194},
	doi = {10.1049/el:20011025},
	author = {Xotta, A. and Gerosa, A. and Neviani, A.}
}
