@article {704,
	title = {A 0.7 V Multi-Class Digital Doherty Power Amplifier for BLE Applications With 41\% Peak DE in 22 nm CMOS},
	journal = {IEEE Solid-State Circuits Letters},
	volume = {8},
	year = {2025},
	pages = {217 - 220},
	chapter = {217},
	keywords = {BLE, BT, Clocks, CMOS, Computer architecture, delays, Digital Doherty PA, Impedance, Microprocessors, Modulation, multi-class PA, power amplifiers, Power generation, SCPA, transmitters, uneven Doherty, Voltage},
	doi = {10.1109/LSSC.2025.3591570},
	author = {Fietta, Edoardo Baiesi and Seebacher, David and Ponton, Davide and Bevilacqua, A.}
}
@article {697,
	title = {Efficiency Optimization of Voltage-Mode CMOS Digital Doherty Power Amplifiers},
	journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
	year = {2025},
	pages = {1-9},
	keywords = {asymmetric Doherty, CMOS integrated circuits, Integrated circuit modeling, Modulation, Optimization, power amplifiers, power combining, Power generation, Resistance, RF DAC, series combining transformer (SCT), Switched-capacitor power amplifier (SCPA), Switching circuits, transformers, transistors, Very large scale integration},
	doi = {10.1109/TVLSI.2025.3583797},
	author = {Baiesi Fietta, Edoardo and Seebacher, David and Ponton, Davide and Bevilacqua, A.}
}
@article {715,
	title = {A Fully-Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication},
	journal = {IEEE Solid-State Circuits Letters},
	volume = {8},
	year = {2025},
	pages = {289-292},
	chapter = {289},
	keywords = {amplitude shift keying, CMOS technology, Delay-locked loop, Demodulation, Frequency shift keying, Full-duplex system, galvanic isolators, Gate drivers, Isolators, Modulation, Propagation delay, transceivers, transformers, Voltage control},
	doi = {10.1109/LSSC.2025.3611018},
	author = {Navarin, Lucrezia and Norling, Karl and Parenzan, Marco and Ruzzu, Stefano and Neviani, Andrea and Bevilacqua, A.}
}
@article {672,
	title = {Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters},
	journal = {IEEE Transactions on Microwave Theory and Techniques},
	volume = {72},
	year = {2024},
	pages = {2840-2851},
	keywords = {Baseband, Cartesian transmitter (TX), fully depleted silicon on insulator (FD-SOI) CMOS, Impedance, Internet of Things, Internet of Things (IoT), low-power radio frequency integrated circuit (RFIC) design, Mixers, Modulation, reactive passive mixer, Resistance, Voltage},
	doi = {10.1109/TMTT.2023.3341393},
	author = {Tomasin, Lorenzo and Vogrig, Daniele and Neviani, Andrea and Bevilacqua, A.}
}
@conference {679,
	title = {Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology},
	booktitle = {2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)},
	year = {2024},
	keywords = {CMOS technology, constant slope, controlled delay, Digital-to-time converter (DTC), Fractional-N PLL, integral non-linearity (INL), Modulation, Robustness, Semiconductor device modeling, Sensitivity, Silicon-on-insulator, Topology},
	doi = {10.1109/PRIME61930.2024.10559739},
	author = {Zugno, Nicol{\`o} and Bevilacqua, A.}
}
